From c38f9e4d673a485c08c690dc1a2fe8455206fe25 Mon Sep 17 00:00:00 2001 From: Julien Grall Date: Wed, 18 Nov 2015 17:28:05 +0000 Subject: [PATCH] xen/arm: vgic-v3: Don't implement write-only register read as zero A read to a write only register is unknown. Use a memorable value to differentiate from an actual RAZ register. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/vgic-v3.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index c68afdb2c6..44e926a9df 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -217,12 +217,12 @@ static int __vgic_v3_rdistr_rd_mmio_read(struct vcpu *v, mmio_info_t *info, goto read_impl_defined; case VREG64(GICR_SETLPIR): - /* WO. Read as zero */ - goto read_as_zero_64; + /* WO. Read unknown */ + goto read_unknown; case VREG64(GICR_CLRLPIR): - /* WO. Read as zero */ - goto read_as_zero_64; + /* WO. Read unknown */ + goto read_unknown; case 0x0050: goto read_reserved; @@ -239,15 +239,15 @@ static int __vgic_v3_rdistr_rd_mmio_read(struct vcpu *v, mmio_info_t *info, goto read_reserved; case VREG64(GICR_INVLPIR): - /* WO. Read as zero */ - goto read_as_zero_64; + /* WO. Read unknown */ + goto read_unknown; case 0x00A8: goto read_reserved; case VREG64(GICR_INVALLR): - /* WO. Read as zero */ - goto read_as_zero_64; + /* WO. Read unknown */ + goto read_unknown; case 0x00B8: goto read_reserved; @@ -324,6 +324,10 @@ read_reserved: v, gicr_reg); *r = 0; return 1; + +read_unknown: + *r = vgic_reg64_extract(0xdeadbeafdeadbeaf, info); + return 1; } static int __vgic_v3_rdistr_rd_mmio_write(struct vcpu *v, mmio_info_t *info, -- 2.30.2